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AI for Chip Verification Must Do More Than Generate Code

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In a new SemiWiki interview, MooresLab AI CTO and Co-Founder Sirish Munipalli explains why the next step in semiconductor engineering is AI that can reason across workflows, execute real engineering tasks, and prove its results.

AI is getting better at writing code. But for semiconductor engineers, that’s only part of the problem.

A generated testbench is not the same as a working verification environment. A plausible explanation for a failure is not the same as finding its root cause. And code that looks right is not proof that a design works.

The real question isn’t whether AI can generate code. It’s whether AI can solve the engineering problem.

That’s the challenge at the heart of a new SemiWiki interview with Sirish Munipalli, CTO and Co-Founder of MooresLab AI.

The engineering bottleneck isn’t just design. It’s proving it works.

Sirish has spent approximately 15 years designing and verifying complex silicon, including work at Intel, Qualcomm, and Microsoft. Across those experiences, he saw a recurring challenge: as chip complexity grows, verification teams must do more work while preserving confidence that the final design behaves as intended.

A significant part of that challenge comes down to context. Architectural intent lives in specifications. Implementation decisions live in RTL. Verification engineers must connect the two, often across fragmented documents, tools, and workflows.

When that context gets lost, engineers spend valuable time reconstructing intent, debugging failures, and closing coverage gaps.

AI has the potential to change that. But getting meaningful results requires more than adding a chatbot or code generator to an existing process.

From AI assistance to AI that does the work

At MooresLab AI, we’re developing an ecosystem of agentic AI products designed around the actual work semiconductor engineers need to accomplish.

Each agent addresses a specific part of the engineering workflow:

  • SpecAgent turns source materials such as datasheets, design notes, and addenda into a living specification with traceability to source material and visibility into gaps. It helps teams preserve design intent and establish a shared foundation for downstream engineering work.
  • VerifAgent generates UVM verification environments from specifications, helping engineers accelerate testbench development.
  • DebugAgent analyzes failures to help engineers identify root causes rather than spend hours manually sorting through logs.
  • CoverageAgent helps teams identify and close remaining coverage gaps, with reasoning engineers can review.

The goal is not simply to produce more code. It’s to help engineers move through the work between design intent and verified silicon with less manual effort and greater confidence.

Trust comes from evidence, not confident answers

In semiconductor engineering, an AI-generated answer cannot be trusted simply because it sounds convincing.

That’s why our approach connects agentic workflows to real engineering tools and simulation. A model can propose a solution, but simulation provides the evidence needed to evaluate whether that solution works.

We also believe engineers should remain in control. Results need to be visible, reviewable, and grounded in the requirements and workflows teams already use.

As AI takes on more engineering work, that distinction becomes even more important. The industry needs ways to understand what an agent did, which requirements it addressed, and what evidence supports its results.

The next step: connect the entire workflow

The opportunity extends beyond any single task. Specifications, design implementation, verification, debugging, and coverage closure are connected. Improvements in one stage are more valuable when context carries forward to the next.

That is the direction we’re pursuing at MooresLab AI: an integrated ecosystem of AI agents designed by semiconductor engineers, for semiconductor engineers, to work across the engineering process.

Our measure of progress is practical: less time spent on repetitive engineering work, more time for innovation, and results engineers can evaluate and trust.

Read the full interview on SemiWiki

In his conversation with Daniel Nenni, Sirish shares more about the engineering problems behind MooresLab AI, why simulation matters, how we think about model-agnostic AI, and what comes next for agentic semiconductor engineering.

Read the full interview with Sirish Munipalli on SemiWiki →

Explore how MooresLab AI is putting agentic AI to work across semiconductor engineering at mooreslab.ai.

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Sirish Muipalli
CTO

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