At DVCon this Monday, our Chief AI Officer Shashank Chaurasia will join a panel hosted by AsFigo Technologies in partnership with Accellera Systems Initiative to address a central issue in AI-driven design: scaling Agentic AI is not only a technical challenge, but also an economic one. The session, “Solving the $100k AI-EDA Bottleneck: Scaling Production-Ready Agentic AI,” will examine how the industry can move beyond costly, seat-based tool loops and advance toward open, production-ready AI verification flows built for scale.
Shashank brings deep experience in multi-agent orchestration and autonomous verification loops, with a focus on advancing AI from isolated code generation to silicon-ready RTL. His work on our core product VerifAgentTM centers on how coverage, linting, and regression automation function as intelligent feedback systems within verification environments. Through building AI systems specifically for semiconductor workflows, he offers practical insight into what operates effectively, where constraints emerge, and what must evolve for AI systems to function reliably in production settings.
He’ll share the stage with industry leaders including Srinivasan Venkataramanan (AsFigo), Clifford Cummings (Sunburst Design), Deepak Tala (SmartDV), Yatin Trivedi (Capgemini), Asif ETV (HPC Infra), and Akash Levy (Silimate). Together, the panel will examine open-source UVM engines, lint-driven guardrails such as UVMLint and SVALint, scalable compute infrastructure, and ROI analytics. The discussion will outline considerations for AI-native, license-efficient design flows and explore practical paths toward broader adoption in verification environments.
